1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a fringe field switching (FFS) mode liquid crystal display device and a method for fabricating the same.
2. Description of the Related Art
In general, the driving principle of a liquid crystal display device is based on optical anisotropy and polarization of liquid crystals. Liquid crystals having an elongated structure exhibit directivity in molecular arrangement, and thus the direction of their molecular arrangement can be controlled by artificially applying an electric field to liquid crystals.
Accordingly, if the molecular arrangement direction of liquid crystals is arbitrarily controlled, then the molecular arrangement of liquid crystals may be changed, and light is refracted in the molecular arrangement direction of liquid crystals by optical anisotropy to exhibit image information.
At present, an active matrix liquid crystal display device (AM-LCD; hereinafter, abbreviated as a “liquid crystal display device”) in which thin-film transistors and pixel electrodes connected to the thin-film transistors are arranged in a matrix form have been widely used due to its resolution and video implementation capability.
The liquid crystal display device may include a color filter substrate (i.e., upper substrate) formed with common electrodes, an array substrate (i.e., lower substrate) formed with pixel electrodes, and liquid crystals filled between the upper and lower substrates, in which liquid crystals are driven by an electric field applied in the vertical direction between the common electrode and pixel electrode, thereby having excellent transmittance and aperture ratio.
However, the driving of liquid crystals by an electric field applied in the vertical direction has a drawback of providing insufficient viewing angle characteristics. Accordingly, a driving method of liquid crystals by in-plane switching has been newly proposed to overcome the foregoing drawback, and the driving method of liquid crystals by in-plane switching has excellent viewing angle characteristics.
Such an in-plane switching mode liquid crystal display device may include a color filter substrate and an array substrate facing each other, and a liquid crystal layer is interposed between the color filter substrate and the array substrate.
A thin-film transistor, a common electrode and pixel electrode are provided for a plurality of pixels, respectively, defined on a transparent insulating substrate on the array substrate.
Furthermore, the common electrode and pixel electrode are configured to be separated from each other in parallel on the same substrate.
In addition, the color filter substrate may include a black matrix at a portion corresponding to a gate line, data line, and a thin-film transistor on a transparent insulating substrate, and a color filter corresponding to the pixel.
Moreover, the liquid crystal layer is driven by a horizontal electric field between the common electrode and pixel electrode.
Here, the common electrode and pixel electrode are formed with a transparent electrode to secure brightness.
Accordingly, a fringe field switching (FFS) technique has been proposed to maximize the brightness enhancement effect. The FFS technique allows liquid crystals to be controlled in a precise manner, thereby obtaining high contrast ratio with no color shift.
A method of fabricating a fringe field switching (FFS) mode liquid crystal display device according to the related art will be described with reference to FIGS. 1 and 2.
FIG. 1 is a schematic plane view illustrating a fringe field switching (FFS) mode liquid crystal display device according to the related art.
FIG. 2 is a schematic cross-sectional view illustrating a fringe field switching (FFS) mode liquid crystal display device, as a cross-sectional view along the line II-II of FIG. 1.
An array substrate for a fringe field switching (FFS) mode liquid crystal display device according to the related art may include a plurality of gate lines 13 extended in one direction on a transparent insulating substrate 11 to be separated from one another in parallel; a plurality of data lines 21 crossed with the gate lines 13 to define pixel regions in the crossed areas; a thin-film transistor (T) provided at an intersection of the gate line 13 and the data line 21, and made of a gate electrode 13a extended from the gate line 13 in the vertical direction, a gate insulating layer 15, an active layer 17, an ohmic contact layer 19, a source electrode 21a and a drain electrode 21b; a second passivation layer 27 formed on a front surface of the substrate including the thin-film transistor (T); a pixel electrodes 29 having a large area formed on the first passivation layer 27 and connected to the thin-film transistor (T); a second passivation layer 31 formed on the first passivation layer 27 including the pixel electrode 29; and a plurality of pixel electrodes 37 formed on the passivation layer 35; a plurality of common electrodes 33 formed to be separated from one another on the second passivation layer 31 to correspond to the pixel electrodes 29, as illustrated in FIGS. 1 and 2.
Here, the pixel electrodes 29 having a large area are disposed in a pixel region in which the gate line 13 are data line 21 are crossed with each other.
Furthermore, the common electrode 33 is overlapped with the pixel electrode 29 by interposing the second passivation layer 31 therebetween. Here, the pixel electrode 29 and the plurality of common electrodes 33 are formed of Indium Tin Oxide (ITO) which is a transparent conductive material.
In addition, the pixel electrode 29 is electrically connected to the drain electrode 21b through a drain contact hole 27a formed on the first passivation layer 27.
Moreover, though not shown in the drawing, a color filter layer (not shown) and a black matrix (not shown) disposed between the color filter layers to block the transmission of light are deposited on a color filter substrate (not shown) bonded to the insulating substrate 11 formed with the pixel electrode 29 and a plurality of common electrodes 33, and an overcoat layer (not shown) may be formed on the black matrix and color filter layer to planarize between the black matrix and color filter layer.
Furthermore, though not shown in the drawing, a liquid crystal layer (not shown) may be formed between the color filter substrate (not shown) and the insulating substrate 11 bonded to each other.
As described above, according to a FFS mode liquid crystal display device in the related art, a drain contact hole should be formed to connect a pixel electrode and a drain electrode of the thin-film transistor to the passivation layer, and a liquid crystal disclination region hole is created at the circumference of the drain contact hole during the formation of the drain contact hole, thereby causing light leakage.
Accordingly, in the related art, in order to prevent light leakage caused by creating a liquid crystal disclination region at the circumference of the drain contact hole, the entire circumference portion of the drain contact hole should be covered by using a black matrix (BM), and thus an opening region thereof, namely, an area of the transmission region, may be reduced, thereby decreasing the transmittance of a pixel. In particular, the drain contact hole should be covered with a black matrix (BM) by taking a bonding margin into consideration as much as a distance to prevent light leakage caused by a disclination region of liquid crystals created by the drain contact hole, and thus the transmission region of a pixel may be reduced as much as the distance, thereby decreasing the transmittance to the extent.
Furthermore, it has a structure with no contact hole as well as a structure in which the common electrode is disposed at the uppermost portion, thereby causing a problem such as CT or horizontal line due to interference between data pixels.
Accordingly, in case of a structure in which the common electrode is disposed at the uppermost portion, it has a structure in which the pixel is located adjacent to the data line, thereby causing interference between the data line and pixel electrode.